Laboratories Electronic Design Automation
Electronic Design Automation Laboratory:
5272 Benedum Hall
Current fabrication technologies require sophisticated tools for designers to effectively utilize the capabilities available in a single chip. The capability of current design tools currently lags significantly behind manufacturing capabilities and the gap is continuing to increase. The PittEDA Laboratory designs new tools and techniques to make the design of integrated computing systems efficient and accessible.
To be successful in creating next-generation design flows, entire systems must be designed in concert, taking into consideration the architecture, manufacturing process, and the design tools. However, for the the tools to be accessible, it is necessary to raise the level of abstraction for the design process. Areas of emphasis in the PittEDA lab include:
- Hardware design from high level languages: Current hardware design languages are (1) verbose and cumbersome to write and (2) require specialized hardware design experience to use. Allowing synthesis from high level languages such as C/C++/Java/MATLAB opens doors to algorithm designers and provides tools with higher level algorithmic information that is obscured in VHDL/Verilog.
- Low power synthesis: Power consumption in digital devices has become an important metric in successful hardware implementation. Because tools must now trade off area, performance, and power, the optimization problem has become more difficult. Additionally, the power consumption problem continues to move beyond dynamic power consumption to include static power consumption in the form of leakage power. By considering power consumption in behavioral and high-level synthesis, significant power reduction is possible.
- New reconfigurable paradigms and tools: Reconfigurable devices currently allow very high capability and performance. Current FPGA offerings from Xilinx and Altera have become increasingly heterogeneous providing coarse-grain ASIC RAM blocks, multiply accumulate functional units, and even hard core processors. Unfortunately, these devices have very high power dissipation. By combining architectural and design automation techniques it is possible to reduce the overall power budget of these devices while improving the application performance over traditional reconfigurable devices.
Visit: http://composers.ee.pitt.edu/
